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Staff RTL Design Engineer

Untether AI

Untether AI

Design
Toronto, ON, Canada
Posted on Jan 17, 2025
We’re looking for best in class engineers to join our existing top-notch team. When you join Untether AI, you will be part of the team that creates innovative hardware and delivers industry leading AI performance and efficiency. Utilizing non Von Neumann techniques, you will help propel sustainable AI inference.
As part of this talented team of engineers, you are able to - and are excited to - architect, implement, verify and productize custom hardware designs. Being on our team means collaborating with an extremely bright group of people while tackling tough and interesting problems at the intersection of AI and hardware.
To help grow our organization we are looking for an engineer to help build large SOC’s in advanced packing technology with advanced interfaces. The ideal candidate will have strong experience in integrating large SOCs with complicated clocking schemes. We are looking for someone who is a strong communicator, creative, a critical thinker, and able to analyze and resolve complex issues.

Responsibilities

  • Architect and design cross chip structures such as physical partitioning, redundancy strategies, full chip clocks and resets, boot and power up strategies
  • Design, propose, and oversee the analysis/evaluation of hardware architectures
  • Design and code RTL modules written in Verilog/SystemVerilog
  • Simulate and perform hardware-based testing, debug, and verification
  • Scripting and basic software development in support of hardware design
  • Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment

Requirements

  • B.S, M.S, or Ph.D in Electrical Engineering, Computer Engineering or Computer Science
  • Track record of successful tape outs in advanced process nodes
  • 10+ years of experience in SOC design/microarchitecture
  • Experience in block and chip level microarchitecture including area and power estimation
  • Experience in lab bring-up
  • ASIC development environment tools expertise, including design, implementation and debug
  • Strong knowledge with RTL programming languages Verilog/SystemVerilog (preferred), or VHDL
  • Ability to read and write code in Python (C, C++ are assets)
  • Hands on experience in high speed interfaces such as PCIe, UCIe, and HBM

Preferred Skills & Experience

  • Experience with ASIC physical design process including synthesis, timing closure, and place and route
  • Experience with yield estimation
  • Experience with Agile development methodologies
  • Experience in technical leadership of small teams

What are some of the perks that you will receive being part of Untether AI?

  • Aligned to Untether’s philosophy, our employees enjoy the same perks, regardless of role or level. In part, these include:
  • 20 vacation days
  • Strong health and extended health benefits
  • Unlimited sick days
  • Stock options
  • Building chips and software that will change the world

Thinking about Applying?

  • We’re a pretty welcoming bunch of people. If we’ve piqued your interest, you’re passionate about the same things we are but you aren’t sure if you check all the boxes, please apply anyway. We’re a great place to work, an even better place to learn and we focus on both capability and potential!
  • Besides being a pretty friendly group, we’re also pretty diverse - ethnically, experientially and in our physical and mental abilities. If you are someone who needs accommodation during the interview process and/or in the workplace, please send a note along with your resume to careers@untether.ai and we’ll be in touch.
A little bit more about Untether AI
Untether AI has developed a groundbreaking new architecture that brings neural net inference to new levels of performance and efficiency. We’ve already sold our product to smart clients who want to get in at ground zero. We’ve done this while continuing to improve our technology creating ultra-efficient, high performance AI chips that eliminates the data movement bottleneck that costs energy and performance in traditional architectures. We’re a team made up of scientists, engineers and entrepreneurs and have the support of tier one investors. Join us to be part of something big - a chance to create the future of AI.